A Comprehensive Survey on Electronic Design Automation and Graph Neural Networks: Theory and Applications

scientific article published on 14 June 2022

A Model-Driven Framework for Composition-Based Quantum Circuit Design

scientific article published on 21 August 2024

A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits

A Synthesis Flow for Sequential Reversible Circuits

A compact and efficient SAT encoding for quantum circuits

A general and exact routing methodology for Digital Microfluidic Biochips

A generic representation of CCSL time constraints for UML/MARTE models

ATPG for Reversible Circuits Using Simulation, Boolean Satisfiability, and Pseudo Boolean Optimization

An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs

An Efficient FPGA Architecture with Turn-Restricted Switch Boxes

scholarly article

An Efficient Reduction of Common Control Lines for Reversible Circuit Optimization

An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata

An Examination of the NCV-|u1 > Quantum Library Based on Minimal Circuits

An exact method for design exploration of quantum-dot cellular automata

An improved gate library for logic synthesis of optical circuits

An introduction to reversible circuit design

scholarly article published April 2011

Analyzing Inconsistencies in UML/OCL Models

Approximating Decision Diagrams for Quantum Circuit Simulation

scientific article published in 2022

Assisted Behavior Driven Development Using Natural Language Processing

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Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers

Automated and quality-driven requirements engineering

Automatic Refinement Checking for Formal System Models

Automatic refinement checking for formal system models

BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits

BDD-Based Synthesis of Reversible Logic

BDD-Based Synthesis of Reversible Logic

BDD-based synthesis of reversible logic for large functions

Building free Binary Decision Diagrams using SAT solvers

Checking Reversibility of Boolean Functions

scientific article

Checking concurrent behavior in UML/OCL models

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic

Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models

Completeness-Driven Development

article

Cone of Influence Analysis at the Electronic System Level Using Machine Learning

scholarly article published September 2013

Considering nearest neighbor constraints of quantum circuits at the reversible circuit level

Contradiction Analysis for Inconsistent Formal Models

Contradiction analysis for constraint-based random simulation

article

Contradictory antecedent debugging in bounded model checking

article

Coverage-Driven Stimuli Generation

article

Data extraction from SystemC designs using debug symbols and the SystemC API

Debugging Contradictory Constraints in Constraint-Based Random Simulation

article

Debugging reversible circuits

Decision diagrams for the design of reversible and quantum circuits

Dedicated synthesis for MZI-based optical circuits based on AND-inverter graphs

Designing a RISC CPU in Reversible Logic

Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits

article

Determining Cases of Scenarios to Improve Coverage in Simulation-based Verification

Determining Relevant Model Elements for the Verification of UML/OCL Specifications

Determining minimal testsets for reversible circuits using Boolean satisfiability

Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits

article published in 2015

Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic

Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions

Efficient Simulation-Based Debugging of Reversible Logic

Efficient synthesis of quantum circuits implementing clifford group operations

Elementary Quantum Gate Realizations for Multiple-Control Toffoli Gates

article

Embedding of Large Boolean Functions for Reversible Logic

Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models

Enhancing debugging of multiple missing control errors in reversible logic

Enhancing robustness of sequential circuits using application-specific knowledge and formal methods

Envisioning self-verification of electronic systems

Equivalence Checking in Multi-level Quantum Systems

Equivalence Checking of Quantum Circuits with the ZX-Calculus

scientific article published in 2022

Equivalence Checking of Reversible Circuits

Evaluating the Impact of Interconnections in Quantum-Dot Cellular Automata

Evaluation of Cardinality Constraints on SMT-Based Debugging

Exact Design of Digital Microfluidic Biochips

article

Exact Multiple-Control Toffoli Network Synthesis With SAT Techniques

article published in 2009

Exact One-pass Synthesis of Digital Microfluidic Biochips

article published in 2014

Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures

article published in 2014

Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips

Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares

Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines

Exact Template Matching Using Boolean Satisfiability

Exact routing for digital microfluidic biochips with temporary blockages

Exact routing for micro-electrode-dot-array digital microfluidic biochips

Exploiting Electronic Design Automation for Checking Legal Regulations: A Vision

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Exploiting Negative Control Lines in the Optimization of Reversible Circuits

Exploiting reversibility in the complete simulation of reversible circuits

scholarly article published September 2013

Exploiting the Third Dimension: Stackable Quantum-dot Cellular Automata

scientific article published on 31 May 2023

Extensions to the Reversible Hardware Description Language SyReC

Extracting frame conditions from operation contracts

article

Fast exact toffoli network synthesis of reversible logic

article

Fault Detection in Parity Preserving Reversible Circuits

Fault Ordering for Automatic Test Pattern Generation of Reversible Circuits

article published in 2013

Filmstripping and Unrolling: A Comparison of Verification Approaches for UML and OCL Behavioral Models

FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array

scientific article published on 08 August 2024

Formal Specification Level

Formal methods for emerging technologies

Frame conditions in symbolic representations of UML/OCL models

Frame conditions in the automatic validation and verification of UML/OCL models: A symbolic formulation of modifies only statements

From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits

scholarly article published May 2011

From UML/OCL to Base Models: Transformation Concepts for Generic Validation and Verification

From biochips to quantum circuits: computer-aided design for emerging technologies

From reversible logic to quantum circuits: Logic design for an emerging technology

Gates vs. Splitters

Generating SystemC Implementations for Clock Constraints Specified in UML/MARTE CCSL

article published in 2014

Generating and checking control logic in the HDL-based design of reversible circuits

Generating formal system models from natural language descriptions

Graph Transformation Units Guided by a SAT Solver

article published in 2010

Ground setting properties for an efficient translation of OCL in SMT-based model finding

Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications

Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition

How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips?

scientific article published in 2021

Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking

Improved Fault Diagnosis for Reversible Circuits

Improved SAT-based ATPG: More constraints, better compaction

Improved synthesis of Clifford+T quantum functionality

Improving Coverage of Simulation-Based Verification by Dedicated Stimuli Generation

Improving ESOP-Based Synthesis of Reversible Logic Using Evolutionary Algorithms

Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library

Improving the mapping of reversible circuits to quantum circuits using multiple target lines

Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs

Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits

Introducing QRogue: Teaching Quantum Computing Using a Rogue-like Game Concept

scientific article published on 11 April 2023

Leveraging the Analysis for Invariant Independence in Formal System Models

article published in 2015

Logic Synthesis for Quantum State Generation

Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits

MQT Predictor: Automatic Device Selection with Device-Specific Circuit Compilation for Quantum Computing

scientific article published on 17 June 2024

MQT QMAP

scientific article published on 22 March 2023

Meander Designer: Automatically Generating Meander Channel Designs

Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds

scientific article published on 25 January 2024

Minimal Stimuli Generation in Simulation-Based Verification

Model‐driven engineering of safety and security software systems: A systematic mapping study and future research directions

scientific article published on 26 May 2022

More than true or false

scholarly article published 2017

Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation

OR-Inverter Graphs for the Synthesis of Optical Circuits

article

On Optimal Subarchitectures for Quantum Circuit Mapping

scientific article published on 18 May 2023

On the Difficulty of Inserting Trojans in Reversible Computing Architectures

Optimal SWAP gate insertion for nearest neighbor quantum circuits

Optimizing DD-based synthesis of reversible circuits using negative control lines

Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits

PASSAT 2.0: A multi-functional SAT-based testing framework

Post-Layout Optimization for Field-coupled Nanotechnologies

scientific article published on 25 January 2024

Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams

QMDDs: Efficient Quantum Function Representation and Manipulation

Quantified Synthesis of Reversible Logic

Quantified synthesis of reversible logic

Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits

Realizing reversible circuits using a new class of quantum gates

Reducing Reversible Circuit Cost by Adding Lines

Reducing the Complexity of Operational Domain Computation in Silicon Dangling Bond Logic

scientific article published on 25 January 2024

Reducing the number of lines in reversible circuits

RevKit: An Open Source Toolkit for the Design of Reversible Circuits

RevLib: An Online Resource for Reversible Functions and Reversible Circuits

RevVis: Visualization of Structures and Properties in Reversible Circuits

scholarly article by Robert Wille et al published 2014 in Lecture Notes in Computer Science

Reverse BDD-based synthesis for splitter-free optical circuits

Reversible Circuits: Recent Accomplishments and Future Challenges for an Emerging Technology

Reversible Logic Synthesis with Output Permutation

Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability

article by Arighna Deb et al published 27 June 2016 in ACM Journal on Emerging Technologies in Computing Systems

Reversible computation

SAT-based ATPG for reversible circuits

SMT-based Stimuli Generation in the SystemC Verification Library

SWORD: A SAT like Prover Using Word Level Information

SWORD: A SAT like prover using word level information

Scalable One-Pass Synthesis for Digital Microfluidic Biochips

Simulation before fabrication: a case study on the utilization of simulators for the design of droplet microfluidic networks

scientific article published in 2018

SyReC: A Programming Language for Synthesis of Reversible Circuits

scholarly article published 8 November 2011

SyReC: A hardware description language for the specification and synthesis of reversible circuits

SyReC: a programming language for synthesis of reversible circuits

scholarly article published 2010

Synthese reversibler LogikSynthesizing Reversible Logic

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Synthesis of Arbitrary Quantum Circuits to Topological Assembly: Systematic, Online and Compact

scientific article

Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions

Synthesis of Reversible Circuits Using Conventional Hardware Description Languages

article

Synthesis of Reversible Circuits Using Decision Diagrams

Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams

Synthesis of optical circuits using binary decision diagrams

Synthesis of quantum circuits for linear nearest neighbor architectures

article by Mehdi Saeedi et al published 19 October 2010 in Quantum Information Processing

Synthesis of reversible circuits with minimal lines for large functions

article

Synthesizing Reversible Circuits for Irreversible Functions

article

Synthesizing multiplier in reversible logic

The SyReC hardware description language: Enabling scalable synthesis of reversible circuits

Tools for Quantum Computing Based on Decision Diagrams

scientific article published in 2022

Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis of Reversible Circuits

Towards VHDL-Based Design of Reversible Circuits

Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits

Towards a Design Flow for Reversible Logic

Towards a Generic Verification Methodology for System Models

Towards a Verification Flow Across Abstraction Levels: Verifying Implementations Against Their Formal Specification

Towards a model-based verification methodology for Complex Swarm Systems (Invited paper)

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Towards automatic determination of problem bounds for object instantiation in static model verification

Towards lightweight satisfiability solvers for self-verification

article

Trading off circuit lines and gate costs in the synthesis of reversible logic

Using $$\pi $$ DDs for Nearest Neighbor Optimization of Quantum Circuits

Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability

Validating SystemC Implementations Against Their Formal Specifications

Verification-Driven Design Across Abstraction Levels: A Case Study

Verifying UML/OCL models using Boolean satisfiability

Verifying consistency between activity diagrams and their corresponding OCL contracts

Window optimization of reversible and quantum circuits