A PLiM Computer for the Internet of Things

A Synthesis Flow for Sequential Reversible Circuits

An MIG-based compiler for programmable logic-in-memory architectures

An adaptive prioritized ε-preferred evolutionary algorithm for approximate BDD optimization

Ancilla-free synthesis of large reversible functions using binary decision diagrams

Approximate BDD Optimization with Prioritized ε-Preferred Evolutionary Algorithm

Approximation-aware rewriting of AIGs for error tolerant applications

Assisted Behavior Driven Development Using Natural Language Processing

article

Atomic distributions in crystal structures solved by Boolean satisfiability techniques

article published in 2016

Automated and quality-driven requirements engineering

Automatic property generation for the formal verification of bus bridges

Automating the translation of assertions using natural language processing techniques

BDD minimization for approximate computing

Behavior Driven Development for circuit design and verification

article

Behaviour Driven Development for Tests and Verification

article

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic

Completeness-Driven Development

article

Complexity of reversible circuits and their quantum implementations

article published in 2016

Coverage of OCL Operation Specifications and Invariants

Debugging of Reversible Circuits Using pDDs

Designing a RISC CPU in Reversible Logic

Determining Relevant Model Elements for the Verification of UML/OCL Specifications

Embedding of Large Boolean Functions for Reversible Logic

Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models

Endurance management for resistive Logic-In-Memory computing architectures

scholarly article published March 2017

Equivalence checking using Gröbner bases

Exact Synthesis of Majority-Inverter Graphs and Its Applications

Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines

Exact Template Matching Using Boolean Satisfiability

Formal Specification Level

article published in 2015

Formal Specification Level

Grammar-based program generation based on model finding

Hardware-Software Co-Visualization: Developing systems in the holodeck

scholarly article published April 2013

Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition

Improving the mapping of reversible circuits to quantum circuits using multiple target lines

Lips: An IDE for model driven engineering based on natural language processing

Logic Synthesis for Established and Emerging Computing

Logic Synthesis for Majority Based In-Memory Computing

Logic Synthesis for RRAM-Based In-Memory Computing

Mapping NCV Circuits to Optimized Clifford+T Circuits

MetaSMT: a unified interface to SMT-LIB2

Multi-Objective BDD Optimization with Evolutionary Algorithms

scholarly article published 2015

Multi-objective BDD optimization for RRAM based circuit design

Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits

Pairs of majority-decomposing functions

Precise error determination of approximated components in sequential circuits with model checking

article

Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams

Quantum Circuit Optimization by Hadamard Gate Reduction

Quantum circuits employing roots of the Pauli matrices

Reducing the number of lines in reversible circuits

Requirement Phrasing Assistance Using Automatic Quality Assessment

Requirements Engineering for Cyber-Physical Systems

RevKit: An Open Source Toolkit for the Design of Reversible Circuits

Reversible circuit rewriting with simulated annealing

Self-Verification as the Key Technology for Next Generation Electronic Systems

Simulation graphs for reverse engineering

article

Specification-driven model transformation testing

article

SyReC: A hardware description language for the specification and synthesis of reversible circuits

Synthesis of reversible circuits with minimal lines for large functions

article

Technology Mapping for Single Target Gate Based Circuits Using Boolean Functional Decomposition

Technology Mapping of Reversible Circuits to Clifford+T Quantum Circuits

The complexity of error metrics

scholarly article by Oliver Keszocze et al published November 2018 in Information Processing Letters

Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry

article by Christopher D. Rosebrock et al published June 2016 in Combustion and Flame

Towards a Generic Verification Methodology for System Models

Towards automatic determination of problem bounds for object instantiation in static model verification

Towards automatic scenario generation from coverage information

Trading off circuit lines and gate costs in the synthesis of reversible logic

Upper bounds for reversible circuits based on Young subgroups

scholarly article by Nabila Abdessaied et al published June 2014 in Information Processing Letters

Using Azure Quantum Resource Estimator for Assessing Performance of Fault Tolerant Quantum Computation

scientific article published on 10 November 2023

Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability

Verifying UML/OCL models using Boolean satisfiability

Window optimization of reversible and quantum circuits

metaSMT: focus on your application and not on solver integration