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List of works by Joan-M. Parcerisa

A cost-effective clustered architecture

scholarly article

An Energy-Efficient Memory Unit for Clustered Microarchitectures

Boosting mobile GPU performance with a decoupled access/execute fragment processor

Boosting mobile GPU performance with a decoupled access/execute fragment processor

Early Register Release for Out-of-Order Processors with RegisterWindows

article published in 2007

Efficient interconnects for clustered microarchitectures

Eliminating redundant fragment shader executions on a mobile GPU via hardware memoization

Improving Branch Prediction and Predicated Execution in Out-of-Order Processors

Improving latency tolerance of multithreading through decoupling

Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum

article published in 2010

Neither more nor less: optimizing thread-level parallelism for GPGPUs

On-chip interconnects and instruction steering schemes for clustered microarchitectures

scholarly article by Joan-M. Parcerisa et al published February 2005 in IEEE Transactions on Parallel and Distributed Systems

Reducing wire delay penalty through value prediction

Selective predicate prediction for out-of-order processors

TEAPOT

article published in 2013

The latency hiding effectiveness of decoupled access/execute processors

The synergy of multithreading and access/execute decoupling

Ultra-low power render-based collision detection for CPU/GPU systems

Visibility Rendering Order: Improving Energy Efficiency on Mobile GPUs through Frame Coherence

scholarly article by Enrique de Lucas et al published 1 February 2019 in IEEE Transactions on Parallel and Distributed Systems

Work in progress-improving feedback using an automatic assessment tool

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