A Pattern Recognition Mezzanine based on Associative Memory and FPGA technology for Level 1 Track Triggers for the HL-LHC upgrade
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| Description | scholarly article by D. Magalotti et al published 22 February 2016 in Journal of Instrumentation |
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author: Fabrizio Palla Aniello Spiezia Livio Fanò Loriano Storchi Enrico Rossi Giacomo Fedi Leonello Servoli Francesco Crescioli Gian Mario Bilei |
| Publication date | February 22, 2016 |
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