A 550-$\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS
| Image |  |
|---|---|
| Description | scientific article published in 2019 |
| Author/s |
author: Rui P Martins |
| Publication date | April 2019 |
| Language | |
| Country of origin | |
| Wikipedia link | |
| Copyright status | |
| Missing/wrong data? | Edit Wikidata item |